The manufacture of integrated circuits (IC) pushes toward the trend of making products compact and integrated. One of the targets of IC design is to combine multiple functions into a single IC such that the capability of systemization is provided. However, an IC with multiple functions integrated will possibly result in overcomplicated processing steps accompanied with huge die area, causing a reduction of product yield. Therefore, processes with different functions or with integration hardship will be separated into different dies for manufacturing. A multi-die packaging technique is then employed for the packaging of dies with various functions into a single package, so that the purpose of systemization is achieved.
Please refer to FIG. 1, which is a conventional single-die packaging structure. A logic die 110 (or a mixed signal die) is configured with pad 120, which will be connected to lead 130 of a package body (not shown) through the bonding wire constituting the I/O pins of the entire package.
Please refer to FIG. 2, which is a conventional multi-die packaging structure. FIG. 2 shows a memory die 150 configured above die 110 in the packaging structure. Die 110 is configured with a set of pads 120 for connecting to lead 130 of the package body (not shown). Die 110 is configured with another set of pads 122 for providing a connection to pad 160 of die 150 so that die 110 can access the data on die 150, which resides within the same package. It should be noted that die 150 can also have another set of pads 162 for connecting to lead 130 of the package body although they are not shown in the figure.
The cost of optical masks and wafers, which increases rapidly, concurs with the progress of fabrication technology. Therefore, a minimum amount of sales is required to maintain the regular profit. However, consumer electronics varies insignificantly in detailed specifications such that a single type of product may only have a very limited market scale. The following are a few features to consider when selecting packages for conventional dies: 1. Dies of the same package type with different number of pins; 2. Dies with the same number of pins, but connected externally by different pads for different functions, such as the data pin outputs of a 32-bit DRAM (Dynamic Random Access Memory) supporting external 32-bit DRAM, and data pin outputs of a 16-bit DRAM supporting only external 16-bit DRAM; 3. Dies with the same number of pins, but with different internal circuit functions selected through the internal pad links. For example, if a certain pad is linked to the voltage source pin (VDD Pin), the 32-bit DRAM is supported; if linked to the ground pin (GND Pin), the 16-bit DRAM is supported instead. This is referred as a bonding option. Nonetheless, current designs provide only one type of packaging, which includes the single-die packaging or the multi-die packaging. Manufacturers would have to provide a variety of pad counts for different circuit layouts in order to satisfy clients' needs. Therefore, the overall cost for IC manufacturing can hardly be reduced.